The capability for redundancy-programing after fabricating integrated semiconductor devices is desirable for many devices including programmable logic devices, programmable memories and linear circuits, as well as for selecting discretionary wiring in VLSI devices.
In a random access memory (RAM) device, for example, a large number of memory cells are arranged in rows and columns. The density of defects generated in the RAM during manufacturing is relatively independent of the integration density of the device, depending more on the semiconductor manufacturing technology. In-general, the higher the integration density of the device, the larger the ratio of normal memory cells to defective memory cells. This larger ratio is one of the advantages of increasing the integration of a semiconductor memory device.
Even if the RAM includes only one defective memory cell, the device cannot be operated normally. To overcome this problem, RAM devices may include a plurality of redundant memory cells, e.g., redundant rows and/or columns of memory cells. Thus, when a defective memory cell is detected by testing, for example, during the final stages of the manufacturing process, it is replaced by one or more redundant memory cells. This replacement is generally accomplished by replacing a row or column of memory cells rather than by replacing an individual cell. In other words, a row containing a defective memory cell is replaced by a redundant row containing only operating memory cells.
It will be apparent that the use of redundant memory cells further requires inclusion of a control circuit so that associated encoders or decoders will properly address the selected redundant row or column of memory cells in response to an address for a row or column containing the defective memory cell. It will also be apparent that the control circuit includes one or more circuit elements for storing information, elements for selecting between groups of memory cells, and some additional device for programming the information storing elements. U.S. Pat. Nos. 4,606,830 and 4,707,806 disclose examples of this type of control circuit. IBM Technical Disclosure Bulletin Vol. 27, No. 11 (April 1985) discloses a programmable address inverting circuit wherein the condition of a fuse or programmable link provides selected switchable complementary output signals used in driving an address buffer. The logical extension of such control circuits is to provide built-in self repair circuits, such as that disclosed in Sawada et al., "Built-in Self-Repair Circuit for High-Density ASMIC," IEEE Conference of Custom Integrated Circuits, pages 26.1.1-26.1.3 (1989), for VLSI devices.
Fusible links are known for redundancy-programming a variety of semiconductor devices, including the RAM device discussed above. Fusible links are either open or closed, thus effectively storing "0" or "1" values. These links are generally programmed by either applying a predetermined voltage directly to the fusible link or by applying an external energy source such as a laser beam to the fusible link. U.S. Pat. Nos. 4,042,950 and 4,135,295 disclose fusible links closed by a predetermined voltage applied to the link, which produces a current density greater than the required fusing current, thus removing an insulating layer and closing, i.e., shorting, the fusible link. U.S. Pat. No. 4,670,970 discloses a normally open fusible link which closes by solid phase diffusion of metal into a silicon layer to produce a conductive silicon layer. U.S. Pat. No. 4,446,534 discloses a circuit including a fusible link which is programmed by applying a voltage of opposite polarity rather than a relatively high voltage of normal polarity. U.S. Pat. No. 4,455,495 discloses a fusible link of the second type wherein a non-conductive element is short circuited by application of a laser beam. Of course, devices are also known where fusible links are programmed by application of both a predetermined voltage and a laser beam, such as that disclosed in U.S. Pat. No. 4,912,066.
In recent years, redundancy-programming using an applied laser beam has become the programming method of choice. However, this programming method has several disadvantages. Programming mechanisms for this type of programming are expensive, often costing in excess of a million dollars per work station. In addition, laser redundancy-programming is relatively slow due both to the need to select the individual fusible links to be programmed as well as to the need for post-programming fabrication steps such as clean up of the area, e.g., the blast crater, around the fusible link. It will also be appreciated that continually increasing device densities will eventually produce element spacing so small that laser programming cannot be accomplished without at least partial damage to adjacent elements, which will, of course, result in reducing the mean time between failures for these high density devices. Moreover, misalignment between the laser spot and the fuse to be blown may lead to incomplete or inaccurate fuse blow, which could actually detract from the overall process yield. Other problems associated with programmable fusible links are discussed in U.S. Pat. No. 4,546,454.
Control circuitry, which includes fusible links for redundancy-programming, is disclosed in U.S. Pat. Nos. 4,571,707 and 4,609,830. In addition, circuitry for detecting the condition or state of fusible links includes the coincidence detection circuit of U.S. Pat. No. 4,707,806, as well as the circuit employing a flip-flop, which includes a plurality of conventional fuses, disclosed in U.S. Pat. No. 4,837,520.
During recent years, it has been reported that current-induced resistance decreases in heavily doped polysilicon resistors is possible. See Kato et al., "A Physical Mechanism of Current-Induced Resistance Decrease in Heavily Doped Polysilicon Resistors," IEEE Transactions on Electron Devices, Vol. ED28, No. 8, pages 1154-61 (August 1982). Resistance decreases of up to 50 percent, which are controllable within an accuracy of 0.01 percent, were reported. Another antifuse concept is described by Hamdy et al., "Dielectric Based Antifuse for Logic and Memory ICs," Transactions of the International Electron Device Meeting, pages 786-789 (San Francisco, December 1988), which discloses the use and programming of a polysilicon insulator-diffusion sandwich which is programmed by rupturing the insulator between the two conducting layers at high voltage (18 V). An additional programmable scheme is described by Y. Shacham-Diamand et al. in "A Novel Ion-Implanted Amorphous Silicon Programmable Element," International Electron Device Meeting, Digest 1987, pages 194-197 (Washington, D.C., 1987). The method consists of creating a highly resistive amorphous layer by heavy dose ion-implantation and switching the layer to low impedance by applying a programming voltage to the layer.
The use of polycrystaline silicon in semiconductor devices is known for fabricating electrically tunable resistors, such as disclosed in U.S. Pat. No. 4,210,996, as well as other structures including photoconductor sites, as disclosed in U.S. Pat. No. 4,821,091. The fact that the resistance of a polycrystaline silicon resistor varies linearly according to the magnitude of an applied voltage, once a threshold voltage has been applied, has also been used in switching circuitry, such as the read only memory (ROM) device disclosed in U.S. Pat. No. 4,146,902, and control signal generating circuitry disclosed in U.S. Pat. No. 4,399,372. Methods for manufacturing semiconductor devices from polycrystaline silicon are disclosed in U.S. Pat. Nos. 4,229,502 and 4,309,224. However, the programming of antifuse polysilicon devices generally requires application of tens of volts in order to produce the required current density necessary to induce resistance changes in the polysilicon. Given the high densities and short channel lengths of current integrated circuitry, application of such high voltage/current stresses should be avoided if possible.